A MISFET is formed by forming a gate electrode on a substrate via a gate insulating film and by forming a source/drain region on the substrate.
There is also a technique of forming a MISFET by growing an epitaxial semiconductor layer for a source/drain on a substrate.
Japanese Patent Application Laid-Open Publication No. 2004-95639 (Patent Document 1) and Japanese Patent Application Laid-Open Publication No. 2003-158200 (Patent Document 2) disclose techniques related to a semiconductor device in which a MISFET is formed by growing an epitaxial layer for a source/drain.